Product Overview
The Hygon DCU K100 AI (DCU Gen 3) is a high-performance GPGPU accelerator card launched by Hygon Information for AI data centers. Based on the in-house x86-compatible GPGPU architecture, it delivers 192 TFLOPS of FP16/BF16 compute and 392 TOPS of INT8 compute, equipped with 64GB HBM2e memory and 896 GB/s of memory bandwidth. Compatible with the ROCm/DTK software stack, it can greatly reduce CUDA migration costs and is purpose-built for domestic large-model training and inference. (Standard K100: FP64 24.5 TFLOPS, peak of about 100 TFLOPS, 64GB HBM2e, 896 GB/s, about 300W, retaining double-precision capability.)
Product Evolution:
- DCU Gen 1 (2022): early GPGPU, DCU architecture validation
- DCU Gen 2 (2023): double-precision K100 + AI-optimized edition
- DCU K100 AI (2024): 192 TFLOPS FP16, x86 instruction set — this page
- DCU Gen 3 (planned): next-generation GPGPU
Core Specifications
| Parameter | Value |
|---|
| Architecture | In-house GPGPU, x86 instruction-set compatible |
| Process | Advanced node (estimated 7nm; not officially disclosed) |
| FP32 | 49 TFLOPS |
| TF32 | 96 TFLOPS |
| FP16 / BF16 | 192 TFLOPS |
| INT8 | 392 TOPS |
| Memory | 64 GB HBM2e |
| Memory Bandwidth | 896 GB/s (HBM2e, dual ring buses, measured utilization 92%+) |
| Bus Topology | Dual ring HBM2e buses (read/write separation to avoid conflicts) |
| Scheduler | Unified tensor scheduler that dynamically senses Attention QKV matrices |
| TDP | 350 W (K100-AI edition; standard K100 about 300W) |
| Form Factor | PCIe full-height, full-length, dual-slot card |
| Release | 2024 |
| Software Ecosystem | DTK (DCU Toolkit), based on ROCm, CUDA compatible |
DTK Software Ecosystem
| Layer | Tool | Description |
|---|
| Runtime | ROCm | AMD's open-source GPGPU platform |
| Programming Framework | DTK (DCU Toolkit) | Hygon's in-house stack, HIP/CUDA compatible |
| AI Frameworks | PyTorch (HIP backend) | Automatically mapped through ROCm |
| TensorFlow | Supported |
| PaddlePaddle | Baidu PaddlePaddle |
| Compiler | HIPIFY | Automatic CUDA code conversion tool |
| Operator Library | MIOpen | cuDNN-like |
| Quantization | FP16/INT8 mixed precision supported | Native BF16 format |
CUDA compatibility: through the DTK/HIP ecosystem, CUDA code can be automatically converted into DCU-executable code, with far lower migration cost than fully in-house architectures.
| Parameter | Details |
|---|
| Company | Hygon Information Technology Co., Ltd. |
| Stock Code | 688041 (STAR Market) |
| Technology Origin | x86 licensing + in-house DCU architecture |
| K100 AI Launch | 2024 |
| Key Customers | The three major telecom operators, intelligent computing centers, state-owned enterprises in finance/energy |
| Benchmark Product | NVIDIA H20 (FP16 192 vs H20 148 TFLOPS) |
| Price Advantage | Considerably cheaper than the H20 |
Key Technical Features
- Dual ring HBM2e buses: physically separated read/write paths, measured utilization steady at 92%+ (about 76% for same-generation competitor cards); excellent performance on training workloads such as ResNet-50
- Unified tensor scheduler: dynamically senses QKV matrix size changes in Attention layers, eliminating scheduling jitter
- x86-compatible ecosystem: underlying instruction set compatible with x86, lowering software development migration costs
- Native BF16: hardware support for the Brain Floating Point format
- Qwen-7B fine-tuning test: when batch size jumps from 4 to 8, the utilization curve shows almost no sharp rise (the A100, by contrast, exhibits clear scheduling jitter)
Use Cases
- ✅ Domestic intelligent computing centers (x86 ecosystem compatibility; preferred by SOEs/operators)
- ✅ Large-model training (domestic models such as the Qwen series and Baichuan)
- ✅ Large-model inference (192 TFLOPS FP16 inference services)
- ✅ Computer vision training (ResNet-50, YOLOv8)
- ✅ Scientific computing (x86 ecosystem + large-scale linear algebra, PDE solving)
- ❌ Native CUDA ecosystem (requires HIP translation; some operators need manual optimization)
- ❌ Extra-large model training (limited by 64GB memory; requires multi-card parallelism)
Comparison with NVIDIA H20
| Metric | Hygon DCU K100 AI | NVIDIA H20 | Difference |
|---|
| FP16 | 192 TFLOPS | 148 TFLOPS | DCU K100 +30% |
| INT8 | 392 TOPS | 296 TOPS | DCU K100 +32% |
| Memory | 64GB HBM2e | 96GB HBM3 | H20 1.5x |
| Software Ecosystem | DTK (ROCm) / HIP | CUDA | H20 more mature |
| Price | Lower | Higher | DCU K100 has the advantage |
| Supply | Stable domestic supply | Export control risk | DCU K100 is secure |
DCU K100 strengths: compute surpasses the H20, lower price, secure supply; weaknesses: smaller memory, software ecosystem maturity behind CUDA.
Domestic GPU Ecosystem Comparison
| Product | Architecture | FP16 (TFLOPS) | Memory | Software Ecosystem | Strength |
|---|
| Hygon DCU K100 | GPGPU/x86 | 192 | 64GB HBM2e | DTK (ROCm) | x86 compatible |
| Cambricon MLU 590 | In-house MLUv05 | 128 | 96GB HBM2 | NeuWare | Mature domestic AI |
| Kunlunxin P800 | XPU-P | 345 | Not disclosed | In-house | Strongest compute |
| MetaX C600 | XCORE 1.5 | ~300 (FP8:1000) | 144GB HBM3e | MXMACA | Largest memory |
| Enflame T20 | GCU-CARA | ~80 (TF32:160) | 64GB HBM2E | TopsRider | Cluster solution |
Key Timeline
| Date | Event |
|---|
| 2016 | Hygon Information founded (AMD x86/Zen licensing) |
| 2022 | DCU Gen 1 released |
| 2023 | DCU Gen 2 double-precision K100 released |
| 2024 | DCU K100 AI launched (DCU Gen 3 AI edition) |
| 2025 | Large-scale deployment of the K100 AI |