Skip to main content

3 posts tagged with "Roadmap"

Vendor AI chip roadmap updates and forecasts

View all tags

昇腾 960 官宣发布:FP4 算力翻倍、全球首个 NPO 超节点,华为确认一年一代

· 6 min read
Industry Research Team

2026 年 9 月 17 日,华为全联接大会(HC2026),华为常务董事、ICT 基础设施业务总裁汪涛正式发布昇腾 960。与 8 月数字中国峰会上的"路线图预告"不同,这次是完整的规格官宣——而且提前三个季度就绪。本文基于华为官网新闻稿及多方报道整理,逐项拆解 960 的规格、超节点与路线图含义。


1. 昇腾 960:双版本,训练先行​

昇腾 960 分为两个版本,节奏错开一个季度:

指标昇腾 960DT(训练版)昇腾 960PR(推理版)
FP8 算力2 PFLOPS(较 950 翻倍)待披露
FP4 算力4 PFLOPS待披露
显存288GB(自研 HBM)待披露
显存带宽9.6 TB/s待披露
配套超节点Atlas 860(风冷)Atlas 960(液冷)
就绪 / 上市2027 Q1 / 2027 Q22027 Q3

三个读数:

  • 提前三个季度就绪:960DT 原计划 2027 年 Q4,现在 2027 Q1 就绪、Q2 上市——与 950DT"提前上线华为云"一脉相承,路线图可信度在持续兑现;
  • 精度口径与英伟达对齐:FP8 / FP4 主口径(辅以自研 HiF8 / HiFP8),FP4 已是 2026 新卡的通用口径;
  • 288GB 自研 HBM + 9.6TB/s:显存容量与带宽同步翻倍,对训练长上下文大模型是实打实的容量红利。

单卡规格详见昇腾 960 规格页;上一代昇腾 950DT 规格页。

2. 昇腾 960 超节点:全球首个 NPO 超节点​

这是本场发布真正的"重器"——昇腾 960 超节点是全球第一个采用 NPO(近封装光学)的超节点:

指标昇腾 960 超节点
单节点规模4096 卡
系统算力8 EFLOPS FP8 / 16 EFLOPS FP4
HBM 总容量1 PB
互联 RTT低至 2μs
可用度99.8%

NPO 意味着什么:传统光模块挂在交换机面板上,信号要先出封装再转电—光;NPO 把光引擎挪到交换芯片封装近旁,大幅缩短 SerDes 距离、降低功耗与时延。华为的具体数字:

  • 5500 个自研 Hi-ONE 光引擎(业界首个量产 NPO,单引擎 7.2T);
  • 替代 4.8 万颗 800G 光模块;
  • 降低功耗 550kW 以上,同时支撑 2μs 级互联时延。

对比 8 月数字中国峰会的口径(Atlas 960 单超节点 15488 卡),官方最新口径为单超节点 4096 卡(1 个超集群可由多超节点组成)——以华为官网最新新闻稿为准。

⚠️ 华为还给出了"MFU 提升 2.75 倍""推理时延降低 70%"等收益数据,均出自华为马尔科夫实验室仿真,尚无独立第三方实测,阅读时注意口径。

3. 一年一代:970(2028)→ 980(2029)​

华为首次把"一年一代"从愿景变成官宣承诺:

年份产品状态
2026昇腾 950 系列950PR 已量产,950DT Q4 放量
2027昇腾 960本次官宣,提前就绪
2028昇腾 970HC2026 确认
2029昇腾 980HC2026 确认

支撑这一节奏的是华为提出的"韬定律":算力规格每代翻倍,访存带宽、访存容量、互联带宽同步大幅提升。

生态侧的同场数据也值得记录:CANN 外部开发者占比首次超过 61%、月活开发者 5200 人;910C 超节点部署已超 1000 套。

4. 竞争坐标:单卡有代差,系统级对打​

把 960DT 放到 2027 年的棋盘上看:

  • 对 NVIDIA Rubin(R200:288GB HBM4 / 50 PFLOPS FP4):单卡 FP4 算力约为 R200 的 8%(4 vs 50 PFLOPS),单卡代差客观存在;但 4096 卡超节点 + NPO 互联是系统级竞争——用"可交付的超大集群"对打单卡性能;
  • 对采购方:960 的价值主张是"在国产量产约束内拿到最大可用集群"。DeepSeek 拟采购 16 万颗 950DT 跑推理的订单已经证明:当供给与生态到位,头部实验室愿意主动选国产;
  • 对国产链条:950→960 的显存翻倍直接拉动国产 HBM 迭代,这是整条链的胜负手。

5. 小结​

  • 960DT:FP8 2P / FP4 4P、288GB HBM、9.6TB/s,2027 Q2 上市,提前三个季度;
  • 960 超节点:全球首个 NPO 超节点,4096 卡 / 8 EFLOPS FP8 / 1PB HBM / RTT 2μs;
  • 路线图:一年一代官宣至 2029,950、960 均提前兑现,规划可信度显著上升;
  • 看什么:2027 Q2 实际交付节奏、国产 HBM 产能、CANN 生态的第三方模型覆盖度。

相关阅读​

参考资料​

  • 华为官网:发布全球首个采用 NPO 的超节点(昇腾 960 超节点)(2026-09-17)
  • 电子工程专辑:国产 AI 芯片新突破!华为昇腾 960 芯片将提前发布
  • 环球网:华为全联接大会 2026 主题演讲报道

本文基于华为官网新闻稿与公开报道整理。MFU、时延等收益数据为华为实验室仿真口径;2028 / 2029 产品仅为路线图官宣,规格以未来发布为准。

AWS Adds Another 2 Million NVIDIA GPUs: Vera CPU Debuts on AWS, 100,000 GPUs Reserved for the U.S. Government AI Factory

· 5 min read
Industry Research Team

This article is based on official announcements from AWS and NVIDIA (September 5, 2026) and public statements by executives of both companies.

On September 5, 2026, AWS and NVIDIA announced an expanded strategic partnership: on top of the "1 million additional GPUs starting in 2026" plan announced at GTC 2026, they will deploy 2 million more NVIDIA GPUs, covering three architecture generations — Blackwell Ultra, Rubin, and Rubin Ultra — with a deployment window of 2027-2028. Demand growth exceeding all previous forecasts was the direct reason both companies cited.

This is no longer a simple "chip purchase" — it is a full-stack partnership spanning GPUs, CPUs, interconnect, memory, open-source models, and software. We break the key information into six points.

1. Composition and Timeline of the 2 Million GPUs​

  • Scale: 2 million GPUs (added on top of the original 1 million GPU plan, tripling the total committed scale)
  • Architectures: Blackwell Ultra, Rubin, Rubin Ultra
  • Timeline: 2027-2028, deployed across AWS global infrastructure (including newly built AI factories)
  • Context: Amazon's 2026 capital expenditure guidance has been raised from $200 billion to $220 billion, and CEO Andy Jassy has explicitly said it is still not enough to meet AI compute demand

For reference, the figures Jensen Huang gave at GTC 2026 put cumulative orders and demand for the Blackwell and Rubin platforms through 2027 on track to reach $1 trillion (at GTC 2025, the estimate for 2026 was roughly $500 billion). AWS's add-on order is one of the heaviest puzzle pieces in that big picture.

2. Vera CPU Comes to AWS for the First Time​

This is the most structurally significant change in the partnership: NVIDIA Vera CPU infrastructure will enter AWS.

The Vera CPU is the general-purpose processor in the Vera Rubin platform designed for agentic AI, positioned to efficiently turn AI resources into "completed agent tasks." As agentic workloads rise, CPU-side pressure on task orchestration, memory management, and data scheduling rises in step — pure GPU expansion is no longer enough, and AWS needs a matching high-performance CPU layer. This also aligns with AWS's strategy of "offering the broadest compute choices, from in-house chips (Graviton/Trainium) to partner chips": Vera does not replace Trainium, but fills in the CPU compute layer alongside the accelerated infrastructure.

At re:Invent 2025, AWS announced that its next-generation Trainium chip would support NVIDIA NVLink Fusion high-speed interconnect. This time, both companies took the partnership one step further:

  • Amazon Annapurna Labs will support NVIDIA's new custom high-bandwidth memory NVHBM (developed in collaboration with memory vendors)
  • Trainium thereby gains a faster, more power-efficient memory option
  • Trainium and GPUs can work together within the same rack-scale architecture, sharing scale-up interconnect

For the chip industry, this is a signal worth watching closely: NVLink Fusion + NVHBM means NVIDIA's interconnect and memory technologies have started "supplying" competing ASICs. The boundary between the in-house ASIC camp (Trainium, TPU, MTIA) and the NVIDIA GPU camp is shifting from "either/or" to "hybrid deployment."

4. 100,000 GPUs: The U.S. Government Sovereign AI Factory​

A dedicated public-sector business is carved out of the partnership: AWS and NVIDIA will build AI factories for the U.S. government, deploying 100,000 GPUs on secure AWS infrastructure to host federal and national security workloads (Impact Level 6 and above), supporting the development of advanced AI models within strict regulatory frameworks.

Sovereign AI turning from a slogan into concrete numbers is a defining feature of this cycle — government customers are becoming first-class buyers of AI compute.

5. Software and Physical AI Deepen in Parallel​

Beyond hardware, the software layer of the partnership is also strengthening:

  • NVIDIA Nemotron open-source models continue to arrive on Amazon Bedrock and SageMaker
  • Amazon EMR data processing and OpenSearch vector indexing are accelerated by cuDF / cuVS
  • Amazon Robotics officially adopts the NVIDIA physical AI platform (Jetson, Omniverse, Isaac) for warehouse automation and next-generation robotics

Physical AI (robotics, embodied intelligence) is becoming a new growth pole in cloud providers' compute narratives — the same trend as JD.com, Tesla, and others writing embodied intelligence into their compute procurement logic.

6. Implications for Compute Buyers​

ObservationImplication
Demand "beat all forecasts"Supply tightness is not a short-term phenomenon; the 2027-2028 compute window must be locked in now
Mixed procurement across three architecturesDuring the Rubin/Rubin Ultra production ramp-up, Blackwell Ultra remains the delivery mainstay; procurement needs cross-generation planning
CPU layer revaluedagentic AI pushes the bottleneck from GPU to CPU orchestration and memory bandwidth; do not focus only on accelerator cards when selecting
Sovereign AI landsGovernment-scale orders enter the market, further tightening the allocatable supply of high-end GPUs

For decision-makers weighing build versus rent, every massive add-on order from cloud giants reprices the future rental curve. If you are evaluating GPU purchase or rental options, we recommend running a quantitative calculation with the TCO Calculator: enter chip price, power draw, utilization, and rental rates to compare 3-year total cost of ownership.

Summary​

2 million GPUs, Vera CPU in the cloud, NVHBM opening up, 100,000 sovereign compute GPUs — this round of expansion between AWS and NVIDIA pushes the "AI factory" race into the full-stack era. Compute scarcity will most likely only tighten before 2027; whether you are buying, renting, or betting on domestic alternatives, locking in supply and cost curves early is the surest move right now.

(The data in this article comes from official AWS/NVIDIA announcements and public statements by executives of both companies; architecture performance figures are as released by the vendors.)

2026 H2 AI Chip Roadmap Major Update: Qualcomm Enters, AMD MI400 Three Models Unveiled, Huawei Three-Generation Roadmap

· 7 min read
AI Hardware Analyst

June 2026 update — the AI compute card market is undergoing its most dramatic reshuffling in years. This article walks through the latest roadmap developments.


Key Takeaways​

  • Qualcomm AI 200/250 officially enters the datacenter AI inference market, targeting NVIDIA H200
  • AMD MI400 series unveils three models: MI430X (HPC), MI440X (enterprise), MI455X (flagship)
  • Huawei publishes a three-generation roadmap: 950 (2026) → 960 (2027-Q4) → 970 (2028-Q4)
  • Intel Jaguar Shores timeline uncertain, possibly delayed to 2027 or later
  • NVIDIA Rubin R200 is in full mass production; the Vera CPU + Rubin GPU combination is now shipping

1. Qualcomm: Mobile Giant Moves Into Datacenter AI​

AI 100 → AI 200 → AI 250​

Qualcomm officially launched the AI 200 datacenter inference chip in October 2025, marking the mobile giant's formal entry into the datacenter AI market.

ModelLaunchAvailabilityKey Features
AI 1002025-102026 H2Rack-scale AI inference, 768GB LPDDR per card
AI 2502025-102027 H1Near-memory computing architecture, 10x effective memory bandwidth

Why Qualcomm Can Succeed​

  1. Low TCO: LPDDR memory is far cheaper than HBM
  2. Energy efficiency: Mobile chip design heritage, excellent power control
  3. Inference-focused: Not chasing training performance, focused on inference scenarios
  4. Rack form factor: Direct liquid cooling, 160kW rack-level power, Ethernet interconnect

Market Impact​

  • Takes on NVIDIA H200: AI 200 inference performance approaches H200 but with 30-40% lower TCO
  • Pressures NVIDIA: May push NVIDIA to launch inference-specific chips (e.g., Rubin CPX)
  • Diversifies choice: Breaks NVIDIA's monopoly in the inference market

2. AMD MI400 Series: Three Models, Precise Positioning​

At CES 2026 (January 2026), AMD officially unveiled the three models of the MI400 series, precisely covering different markets:

MI430X (HPC + Sovereign AI)​

FeatureSpec
PositioningHPC + sovereign AI
FP32/FP64Supported (key differentiator)
Use casesScientific computing, climate simulation, national AI infrastructure
CompetitorNVIDIA does not make FP64 AI cards

MI440X (Enterprise Servers)​

FeatureSpec
PositioningEnterprise 8-GPU servers
CompatibilityWorks with existing datacenter infrastructure
Use casesEnterprise AI, private cloud, edge inference
AdvantageCheaper and easier to deploy than MI455X

MI455X (Flagship AI Training)​

FeatureSpec
PositioningFlagship AI training + inference
Optimized precisionFP4/FP8/BF16
Helios rackCore component
CompetitorNVIDIA Rubin R200

Helios Rack-Scale Solution​

AMD also launched the Helios rack-scale AI solution at CES 2026:

  • 18 Zen 6 CPUs (2nm process)
  • 72 MI455X GPUs
  • Direct liquid cooling
  • Shipment expected in 2026 H2

3. Huawei Three-Generation Roadmap: 950 → 960 → 970​

Huawei unveiled its three-generation chip roadmap at HC 2025 (September 2025) with a very clear timeline:

Ascend 950 Series (2026)​

ModelLaunchKey Features
950PR2026-Q1PR (inference-optimized), already in mass production
950DT2026-Q4DT (Decode + training), expected to scale up

Technical highlights:

  • Added FP8/MXFP8/MXFP4 support
  • Interconnect bandwidth 2TB/s (2.5x over 910C)

Ascend 960 (2027-Q4)​

  • Doubled compute: All specs double versus the 950 series
  • FP8: ~2 PFLOPS expected
  • Process: N+3 (equivalent to 5nm)
  • Positioning: Targets NVIDIA B200

Ascend 970 (2028-Q4)​

  • Third-generation flagship: Only timeline announced, specs TBD
  • Significance: Huawei's first complete generation-spanning roadmap
  • Signal: China's domestic AI chips have entered a "roadmap-driven" phase

4. Intel Jaguar Shores: Timeline Uncertain​

Original Plan​

  • Launch: 2026
  • Architecture: Xe-HPC + Gaudi fusion
  • Process: 18A (Intel's most advanced)
  • Memory: Possibly HBM4E (instead of originally planned HBM4)

Latest Developments​

  • Possible delay: Some sources suggest a slip to 2027
  • Competitors: AMD MI400 already unveiled, NVIDIA Rubin in mass production
  • Market pressure: Intel is losing ground in the AI chip market; Jaguar Shores is its last chance

Impact on Roadmap​

If Jaguar Shores slips to 2027, Intel will essentially be out of the AI chip market.


5. NVIDIA Rubin Platform: Full Mass Production​

Rubin R200 (2026-Q2 full mass production)​

FeatureSpec
HBM288GB HBM4
Compute50 PFLOPS FP4
NVLinkNVLink 6 (1800 GB/s)
ProcessTSMC 4NP

Rubin NVL72 Cabinet (2026 H2 shipment)​

  • 72 Rubin GPUs
  • 36 Vera CPUs
  • 1.8 EFLOPS FP4
  • Direct liquid cooling

Vera CPU (Debut)​

  • Architecture: Custom CPU replacing Grace
  • Positioning: Deep co-design with Rubin GPU
  • Significance: NVIDIA's transformation from a GPU company into a computing platform company

6. Google TPU v8: Training/Inference Officially Split​

TPU 8t (training) + TPU 8i (inference)​

At Cloud Next 2026, Google announced TPU v8 would officially split into training and inference versions:

FeatureTPU 8t (training)TPU 8i (inference)
OptimizationHigh compute, high bandwidthLow latency, low cost
InterconnectOptical interconnectEthernet
Launch20272027

Significance​

  • Industry trend: Specialization of training/inference chips
  • Followers: Qualcomm AI 200 is also inference-only
  • NVIDIA pressure: Does it need an inference-specific chip?

7. Cerebras WSE-4: Wafer-Scale Engine Evolves​

Core Specs​

FeatureSpec
Transistors1.4 trillion
Compute125 PFLOPS FP8
Launch2026 H2
ProcessTSMC 5nm

Competitive Advantages​

  • Massive model training: A single WSE-4 can train 10T+ parameter models
  • Low-latency inference: Entire model on one chip, no communication overhead
  • Mature software stack: Cerebras stack already supports PyTorch, TensorFlow

8. Market Landscape Analysis​

Training Market​

RankVendorProductMarket Share (est.)
1NVIDIARubin R20070%
2AMDMI455X15%
3GoogleTPU v8t10%
4HuaweiAscend 9605% (mostly China)

Inference Market (New Battlefield)​

RankVendorProductAdvantage
1NVIDIAH200 / Rubin CPXMature ecosystem
2QualcommAI 200Low TCO
3AMDMI440XGood compatibility
4IntelGaudi 4Low price

Trend 1: Rise of Inference-Specific Chips​

  • Qualcomm AI 200: Mobile giant enters the market
  • NVIDIA Rubin CPX: NVIDIA's first inference-specific chip
  • Google TPU 8i: Training/inference officially split

Trend 2: Rack-Scale Solutions Become Standard​

  • NVIDIA NVL72: 72 GPU + 36 CPU
  • AMD Helios: 18 CPU + 72 GPU
  • Qualcomm rack: 160kW liquid-cooled rack

Trend 3: China's Domestic Chips Enter "Roadmap-Driven" Phase​

  • Huawei three-generation roadmap: 950 → 960 → 970
  • Clear timeline: 2026-Q1 → 2027-Q4 → 2028-Q4
  • Significance: From "catch-up" to "planning"

Trend 4: HBM Capacity Becomes the Bottleneck​

  • SK hynix: HBM4 capacity already booked by NVIDIA
  • Samsung: HBM4E samples delivered to AMD
  • Impact: MI400 and Rubin R200 shipments constrained by HBM capacity

10. Procurement Recommendations​

If Procuring in 2026 H2​

  1. Training scenarios:

    • First choice: NVIDIA Rubin R200 (best performance)
    • Alternative: AMD MI455X (better price/performance)
    • Domestic: Huawei Ascend 950DT (China-based customers)
  2. Inference scenarios:

    • First choice: NVIDIA H200 (mature ecosystem)
    • Best value: Qualcomm AI 200 (if available)
    • Cost-sensitive: AMD MI440X
  3. HPC scenarios:

    • Only choice: AMD MI430X (FP64 support)

If Procuring in 2027​

  • Wait for Rubin Ultra: Performance possibly 2x R200
  • Watch MI500: AMD's next-generation product
  • Evaluate TPU v8: If already on Google Cloud

Conclusion​

2026 H2 will be the most fiercely contested half-year in AI chip market history:

  • NVIDIA continues to lead, but its advantage is narrowing
  • AMD precisely positions three models; market share will keep rising
  • Qualcomm enters the inference market; its low-TCO strategy may disrupt the market
  • Huawei has a clear three-generation roadmap; domestic substitution accelerates
  • Intel's Jaguar Shores is make-or-break

For procurement decision-makers, this is the hardest time to decide — every option has clear pros and cons.

For engineers, this is the best of times — chip performance doubles yearly, architectural innovation is endless.


References​

  • AI Compute Card Future Roadmap - MirrorFrog real-time updates
  • NVIDIA Rubin R200 deep dive (see related articles on this site)
  • AMD MI400 series CES 2026 launch (see related articles on this site)
  • Qualcomm AI 100 launch analysis (coming soon)

Last updated: 2026-06-20
Author: Charles Qing
Tags: #roadmap #market-analysis #procurement